Introduction

This document contains information pertaining to the 768-Mbit LQ Family with Synchronous PSRAM stacked device family. The L18 is available as a Non-Multiplex or Address-Data Muxltiplex (ADMux) I/O interface option, while the synchronous PSRAM is available only as a Non-Multiplex I/O interface. The intent of this document is to provide information where this product differs from the Intel StrataFlash® Wireless Memory (L18 SCSP) device.

Refer to the latest revision of the Intel StrataFlash® Wireless Memory (L18 SCSP) Discrete Datasheet (order number: Non-Mux I/O doc #251902 and ADMux I/O doc #313295) for specific flash product details not included in this document.

The 768-Mbit Intel StrataFlash® Wireless memory with synchronous PSRAM stacked device family offers multiple high-performance solutions. The L18 (Non-Mux or ADMux I/O interface option) highlighted features like asymmetrical block array, configurable burst lengths, security using OTP and zero-latency block lock. The L18 delivers up to 54 MHz synchronous burst and page-mode read rates with multi-partitioning Read-While-Write and Read-While-Erase operations. The synchronous PSRAM (Non-Mux I/O interface) is a high-performance volatile memory operating at speeds up to 54 MHz with configurable burst lengths. The PSRAM lower sixteen addresses can be routed to the data pins on the PCB board to enable a flexible flash and PSRAM A/D-Mux I/O interface device design. The L18 stacked device features 1.8 volt low-voltage operation in an Intel® QUAD+ standard footprint and signal ballouts.

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