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Improving Multi-Core Architecture Power Efficiency through EPI Throttling and Asymmetric Multiprocessing
Energy Efficient Computers Future Technology Trends Moores Law: As the world looks to multi-core processors for new performance gains in mainstream computing, we’re entering a new era of computing. You could call it the era of “multi-everywhere.” This new era involves running multithreaded applications on multi-core processors that enable single-die multiprocessing. This new era is the next logical step in driving Moore’s Law into another decade.

Overview: The New Era of “Multi-Everywhere”

As the world looks to multi-core processors for new performance gains in mainstream computing, we’re entering a new era of computing. You could call it the era of “multi-everywhere.” This new era involves running multithreaded applications on multi-core processors that enable single-die multiprocessing. This new era is the next logical step in driving Moore’s Law into another decade.

Yet this next step is not without challenges. One of them is Amdahl’s Law. It says that the speedup possible through parallelism (the concurrent execution of tasks to achieve higher performance) will be limited by the portion of the time spent in the sequential component (or serial component) of an application. In other words, no matter how fast the multithreaded parts of a program run, the speedup of the overall program will be limited by the sequential portion of the computation.

This article focuses on a possible solution for improving the performance and energy efficiency of the sequential component in combination with the parallel components of program execution. The solution is EPI throttling. Using it, we can dynamically vary the energy per instruction (EPI) in different cores according to the amount of parallelism available in an application. The result is an asymmetric multiprocessing (AMP) solution that efficiently addresses parallel and sequential parts of the code. Using AMP with EPI throttling, Intel researchers have demonstrated a 38 percent wall clock (real-time) speedup for a wide range of multithreaded programs with sequential components.

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